JEDEC, the controlling body of the RAM standard, has published details about the DDR5 SDRAM spec to address the demand for ever-faster RAM.The new DDR5 spec is designed to enable scaling memory performance without degrading channel efficiency at higher speeds. This was done by doubling the burst-length to BL16 and bank-count to 32 from 16. DDR5 DIMM also has two 40-bit independent sub-channels, increasing efficiency, and reliability.A new feature deemed Decision Feedback Equalization (DFE) enables IO speed scalability for higher bandwidth and performance improvement. DDR5 supports double the bandwidth of its predecessor, DDR4 with 4.8 gigabits per second possible — but not shipping at launch.Read more